This invention relates to a digital-to-analog conversion circuit capable of preventing a noise produced in a digital signal system from mixing in an analog output.
In a digital-to-analog conversion, in order to obtain an analog signal of high quality, some process is needed to prevent a noise produced in a digital signal system on an input side from mixing in an analog signal system on an output side. FIG. 4 shows a digital-to-analog conversion circuit which employs means for preventing mixing of a noise.
In FIG. 4, digital data DATA to be digital-to-analog converted is provided serially and sequentially from a digital signal processesing circuit 1 in synchronism with a bit clock BCK. Also, from the digital signal processing circuit 1, a word clock WCK is provided every time the digital data DATA for one word is provided. The digital data DATA, the bit clock BCK and the word clock WCK are applied to an optical coupling circuits 2a, 2b and 2c respectively.
The optical coupling circuit 2a consists of a driver DRV, a light-emitting diode PD, which emits light by being driven by an output of the driver DRV, a photo-transister PT to detect an output of the light-emitting diode PD and its load resistance RL. When an input signal is "1", an output from the driver DRV is "1" so that the light-emitting diode PD emits light and the photo-transister PT is turned on to produce a signal "0". To the contrary, if an input signal is "0", the light emitting diode PD does not emit light and the photo-transister PT is turned off to produce a signal "1". The other two optical coupling circuits 2b and 2c have the same construction as that of the optical coupling circuit 2a.
The digital data DATA is applied through the optical coupling circuit 2a to the shift register 3, whereas the bit clock BCK is supplied through the optical coupling circuit 2b as a clock. Then the digital data DATA is written sequentially in a shift register 3. On the other hand, every time the digital data DATA is produced for one word, the word clock WCK synchronized therewith is suppled through the optical coupling circuit 2c to a latch circuit 4 as a latch signal. The digital data DATA stored in the shift register 3 is loaded in the latch circuit 4. Then, each bit output of the latch circuit 4 is supplied in an R-2R ladder circuit 5. The R-2R ladder circuit 5 consists of resistors R, R, . . . which have a predetermined resistance value and resistors 2R, 2R, . . . , which have double resistance value that of the reisitors R, R, . . . and switches SW, SW, . . . , which switch connections of the resistors 2R, 2R, . . . . Each bit output of the latch circuit 4 is supplied to the respective switches SW, SW, . . . as a switching signal, and the respective switches SW, SW, . . . are switched, if a related bit output is "0", so that the resistor 2R is connected to the ground, and, if the bit output is "1", so that the resistor 2R is connected to the output side of the circuit. In this case, the output of the R-2R ladder circuit 5 is in a virtually grounded state due to provision of a posterior inverting amplifier 6. The virtually grounded state will be described later.
At each of branching points A1, A2, . . . An in the R-2R ladder circuit 5, the resistance value on the side of the resistor 2R, and the resistance value on the side of the resistor R (direction of F) seen respectively from each branching point are both 2R. Accordingly, at each of the branching points A1, A2, . . . , An, a flowing current is divided into two currents, namely one flowing on the side of 2R and the other flowing on the side of R. When an output current of a voltage source VR is represented by I, currents which flow from the respective branching points A1, A2, . . . An, through the resistors 2R, 2R, are I/2, I/4, I/8, . . . , respectively. These currents, if a corresponding bit output value of the latch circuit 4 is "1", are selected and provided through the switches SW, SW, . . . . In this manner, currents corresponding to output values of the latch circuit 4 are generated, and applied to the posterior inverting amplifier 6.
This inverting amplifier 6 comprises an operational amplifier 6a, a resistor r1 and a resistor r2. A non-inverting input terminal of the operational amplifier 6a is grounded through a resistor r2, and a resistor r1 is inserted between an output terminal and the non-inverting input terminal. The operational amplifier 6a is operated so that potential of the inverting input terminal keeps ground potential (i.e., the above described virtually grounded state). Then, the output current from the R-2R ladder circuit 5 flows through the resistor r1, and voltage corresponding to this current is delivered from the operational amplifier 6a.
In this manner, the digital data DATA delivered from the digital signal processing circuit 1 is provided after being digital-to-analog converted. Since the shift resister 3 and the latch circuit 4 are electrically insulated from the digital signal processing circuit 1 by optical coupling circuit 2a, 2b and 2c, even if a noise is generated in the digital signal processing circuit 1, it deos not mix in the analog output through the shift register 3 and the latch circuit 4.
The above described conventional digital-to-analog conversion circuit in which mixing of a noise generated in the digital signal processing circuit 1 in the analog output side can be avoided in the optical coupling circuit 2a to 2c, however, has the problem that a noise generated in the shift resister 3 posterior to the optical coupling circuits 2a to 2c and the latch circuit 4 can mix into the analog output. Also, the conventional digital-to-analog circuit has the problem that, since the phase relation between the digital data DATA, the bit clock BCK and the word clock WCK supplied to the shift register 3 and the latch circuit 4 must be kept in a normal state, the optical coupling circuits 2a to 2c must be chosen so that they have the same delay time or, alternatively, circuits which are operated with such a high speed that their delay time can be ignored must be employed as the optical coupling circuits 2a to 2c, with a result that the manufacturing cost increases, no matter which of the above alternatives is adopted. For overcoming this problem, the circuit can be so constructed that an output of the digital signal processing circuit 1 is applied directly to the shift resister 3 and the latch circuit 4 without being applied to the optical coupling circuits 2a to 2c, and the R-2R ladder circuit 5 is optically connected with the inverting amplifier 6. In this case, however, since output of the R-2R ladder circuit 5 is an analog signal, non-linear characteristics of the optical coupling element inserted affects the circuit with resulting decrease in the linearity of the entire circuit.
It is, therefore, an object of the invention to provide a digital-to-analog conversion circuit in which a noise generated in a digital signal processing system is not mixed in an analog output.